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docs: QLogic ISP1040 (QL1040B) register map and firmware interface for the Octane - #335
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…r the Octane The Octane's two integral SCSI controllers are QLogic ISP1040B chips on the IP30 Bridge. This describes what an emulated one has to look like: PCI configuration, the 256-byte register block (BIU, DMA, mailboxes, RISC and SXP banks, HCCR), the firmware's mailbox protocol with every command, status and async event, the firmware image format and load sequence, the request/response queues and IOCB layouts, and how each OS drives it: IRIX 6.5.30 (from the shipped ql.h and a disassembly of the shipped ql.o and PROM strings), Linux qla1280, FreeBSD/NetBSD isp and OpenBSD qlw. Ends with a minimal emulation model and the Octane specifics: Bridge byte swapping (why IRIX's register struct is laid out at offset ^ 2), 64-bit DMA attribute bits, RRBs and interrupts. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01APKCDaLfEv8mFqUmDtAruT
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Documentation only, no code. Adds
docs/Octane/qla1040.mdand links it from the README's peripherals row.The Octane's two integral SCSI controllers are QLogic ISP1040B chips behind the IP30 Bridge. This document collects what an emulated one has to look like, so that someone writing the model does not have to read five drivers and a disassembly first:
qldriver (from the shippedsys/ql.hand a disassembly of the shippedql.o), the IP30 PROM 4.17 (strings only), Linuxqla1280, FreeBSD/NetBSDisp, OpenBSDqlw.Things the model will get wrong unless it knows them: IRIX loads firmware 2.55 with WRITE RAM WORD and never VERIFY CHECKSUM; it re-executes without reloading on every reset, so RISC RAM must survive resets; it runs EXECUTE FIRMWARE at 0x16 first; all of its queues and IOCBs are the 64-bit forms with Bridge attribute bits in the addresses.
Sources are listed at the top with their licences. No leaked IRIX source was used; IRIX behaviour comes from the shipped header and from disassembling the shipped binaries.
Written at the request of a contributor on Discord who asked for a register map, enums and principles of operation for the QLA1040 under docs/octane.
🤖 Generated with Claude Code
https://claude.ai/code/session_01APKCDaLfEv8mFqUmDtAruT